(1) Field of the Invention
This invention relates generally to current mirrors, and more particularly to a current mirror with increased transconductance at low biasing currents.
(2) Description of the Prior Art
Amplifiers with any kind of dynamic biasing face the problem that the input impedance of current mirrors gets to large for very small biasing currents, causing stability problems due to parasitic poles, Currently low current biasing is either not possible or compromises have to be made towards accuracy or power consumption. Especially MOS current mirrors with large mirror ratios 1:N (e.g. N>1 00) suffer from large parasitic capacitance caused by the MOS gate. In case such a current mirror is used e.g. in an amplifier employing dynamic biasing, like the output stage of a “current mode LDO”, as described in the U.S. patent application U.S. Ser. No. 10/948,008 filed: Sep. 23, 2004 the input impedance (1/gm) becomes extremely large for very small currents (e.g. <200 nA). This results in a low frequency pole of the (small signal) current transfer function, which can cause stability problems. Previous solutions have either avoided such low currents or large mirror ratios (both increase power consumption), or used a resistor in parallel to the mirror input. This resistor affects negatively accuracy at medium and low currents in an unpredictable way due to process variations and also increases quiescent current.
There are various patents describing the usage of current mirrors in amplifiers or LDOs.
U.S. Pat. No. 6,710,583 to Stanescu et al. describes a low dropout voltage regulator circuit with non-Miller frequency compensation. The circuit includes an input voltage terminal; an output voltage terminal; an error amplifier having a first input coupled to a reference voltage; a voltage follower coupled to an output of the error amplifier; a pass device; and a feedback network. An input terminal of the pass device is coupled to the input voltage terminal. A control terminal of the pass device is coupled to an output of the voltage follower. An output terminal of the pass device is the output voltage terminal. The feedback network includes two resistors in series between the output voltage terminal and ground. A node between the resistors is coupled to a second input of the error amplifier. A frequency compensation capacitor also is coupled between the output voltage terminal and the node. The output stage comprises a pair of NMOS transistors cascoded by another pair of NMOS transistors, driving current mirror PMOS transistors.
U.S. Pat. No. 5,889,393 to Wrathall discloses a voltage regulator and method of voltage regulation utilizing an error amplifier and a transconductance amplifier together with a voltage reference, startup circuit and output load. The use of the transconductance amplifier allows the use of an arrangement of two poles and a zero such that the composite gain roll-off has a generally constant slope. One of the poles utilized in this stability scheme is the outer pole formed by the resistive-like load and its filter capacitor. Another pole and zero are generated in the error amplifier circuit. To decouple the noisy input supply voltage, sensitive parts of the circuit are powered by the regulated output voltage. A start circuit is provided to start up the output and voltage reference when no output voltage is present. The transconductance amplifier block has special characteristics, which allow it to work to relatively high frequency, above the gain bandwidth product of the control loop. It is driven by a fully differential push-pull, class AB amplifier. The transconductance amplifier utilizes a current mirror approach to current sensing in the output device, which utilizes cascode techniques for more accurate current sensing in the current mirror.
U.S. Pat. No. 5,686,821 to Brokaw discloses a singIe-loop voltage regulator controller including a high-gain transconductance amplifier that accommodates common mode inputs as low as its negative supply rail. The input stage of the amplifier produces a proportional to absolute temperature (PTAT) input offset voltage. The transconductance amplifier's inverting input is connected to the circuit common, or negative supply rail, and a tap from a feedback network is connected to the amplifier's no inverting input. The feedback network provides, at this tap, a PTAT measure of the regulator's regulated output. The amplifier's output is connected to drive a no inverting driver, which, in turn, is connected to drive the control terminal of the regulator's pass transistor. A compensation capacitor connected between the amplifier's output and the regulated output terminal ensures the regulator's stability even for relatively low level load impedances The voltage regulator further comprises a bias circuit connected to provide bias current to a current mirror, and a differential to single-ended converter connected to convert an amplified differential signal from said differential pair into a single-ended signal and to modulate the bias current in response to variations in said amplified differential signal.